preliminary www.rfm.com e-mail: info@rfm.com page 1 of 2 ?2008 by rf monolithics, inc. OP4017B - 3/27/08 ? quartz saw stabilized differential output technology ? very low jitter fundamental-mode operation at 777.60 mhz ? voltage tunable for phase locked loop applications ? optical timing reference for fo rward error correction applications the OP4017B is a voltage-controlled saw clock (vcs c) designed for phase-locked loop (pll) applications in optical data communications systems. the differ ential outputs of the OP4017B are generated by high-q, fundamental mode quartz surface acoustic wave (saw) te chnology. this technique provides very low output jitter and phase noise, plus excellent immunity to power supply noise. the OP4017B differential outputs feature 1% symmetry, and can be dc-configured to dr ive a wide range of high-speed logic families. the OP4017B is packaged in a hermetic metal-ceramic lcc. absolute maximum ratings rating value units dc suppy voltage 0 to 5.5 vdc tune voltage 0 to 5.5 vdc case temperature -55 to 100 c 777.60 mhz optical timing clock OP4017B caution: electrostatic sensitive device. observe precautions for handling. cocom caution: approval by the u.s. department of co mmerce is required prior to export of this device. notes: 1. unless otherwise noted, all specifications include the combined effects of load vswr, v cc and t c . 2. net tuning range after tuning out the effects of initial manufacturing tolerances, vswr pushing/pulling, v cc , t c and aging. 3. the internal design, manufacturing processes, and specific ations of this device are subject to change without notice. 4. specified only for a balanced load with a vswr < 1.2 ( 50 ohms each side), and a v cc = 3.0 vdc. 5. symmetry is defined as the width in (% of total period) measure at 50% of the peak-to-peak voltage of either output. 6. jitter and other noise outputs due to power supply noise or mec hanical vibration are not included in this specification excep t where noted. 7. applies to period jitter of either differential output. m easured with a tektronix csa803 signal analyzer with at least 1000 s amples. 8. see figure 4. 9. one or more of the following united states patents apply: 4, 616,197; 4,670,681; 4,760,352. electrical characteristics characteristic sym notes minimum typical maximum units operating frequency absolute frequency f o 1 777.6 mhz tuning range 2 100 ppm tuning voltage 10 3.3 vdc tuning linearity 1, 8 5 % modulation bandwidth 50 khz q and q output voltage into 50 (vswr 1.2) v o 1,3 0.60 1.1 v p-p operating load vswr 1,3 2:1 symmetry 3, 4, 5 49 51 % harmonic spurious 3, 4, 6 -15 dbc nonharmonic spurious 3, 4, 6, 7 -60 dbc phase noise @ 100 hz offset 3, 6 -70 dbc/hz @ 1 khz offset 3, 6 -100 dbc/hz @ 10 khz offset 3, 6 -125 dbc/hz noise floor 3, 6 -150 dbc/hz q and q jitter rms jitter 3, 4, 6, 7 1ps no noise on v cc 3, 4, 6, 7 12 ps p-p 200 mv p-p noise, from 1 mhz to ? f o on v cc 312ps p-p output dc resistance (between q & q ) 1, 3 50 k dc power supply operating voltage v cc 1, 3 3.13 3.3 or 5.0 5.25 vdc operating current i cc 1, 3 70 ma operating case temperature t c 1, 3 -40c +85c c lid symbolization (yy=year, ww=week) rfm OP4017B yyww smc-8
www.rfm.com e-mail: info@rfm.com page 2 of 2 ?2008 by rf monolithics, inc. OP4017B - 3/27/08 smc-8 8-terminal surface mount case dimension mm inches min max min max a 13.46 13.97 0.530 0.550 b 9.14 9.66 0.360 0.380 c 1.93 nominal 0.076 nominal d 3.56 nominal 0.141 nominal e 2.24 nominal 0.088 nominal f 1.27 nominal 0.050 nominal g 2.54 nominal 0.100 nominal h 3.05 nominal 0.120 nominal j 1.93 nominal 0.076 nominal k 5.54 nominal 0.218 nominal l 4.32 nominal 0.170 nominal m 4.83 nominal 0.190 nominal n 0.50 nominal 0.020 nominal electrical connections terminal number connection 1v cc 2 ground 3 enable/disable 4 q output 5 q output 6 ground 7 8 tuning input lid ground typically 0.01" to 0.05" or 0.25 mm to 1.25 mm (8 places) (the optimum value of this dimension is dependent on the pcb assembly process employed.) typical printed circuit board land pattern a typical land pattern for a circuit board is shown on the right. grounding of the metallic center pad is optional. 1 2 3 4 8 7 6 5 top view a b n j l (x2) d (x8) k (x8) c h g m (x3) e f
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